1. Field of the Invention
The subject of the present invention is a process for interconnecting semiconductor chips in three dimensions, as well as the electronic component resulting therefrom, each of the chips containing, for example, an electronic component, an integrated circuit, or a sensor, the whole being able to constitute for example a micromachine.
2. Discussion of Background
The construction of current electronic systems, both civil and military, must take into account ever greater demands of compactness, owing to the ever higher number of circuits employed.
With this in mind, it has already been proposed to construct stacks of so-called "three-dimensional" (3D) integrated circuits, as described for example in French Patent Application No. 2,670,323 in the name of Thomson-CSF. According to this construction, the semiconductor chips are stacked after having been provided with connection wires oriented towards the lateral faces of the stack, and then they are consolidated together by embedding, for example in a resin; the interconnections of the chips are then made on the faces of the stack.